T-Bird Tail Light Controller

ELEG 2130

Digital Logic Design Laboratory

Lab 10: T-Bird Tail Light Controller

Station: 13

Prepared by:

04/30/13

Objective

In this lab we programed a finite state machine in VHDL and then we tested it. After that, we simulate the various tail light operations for a T-Bird automobile.

Equipment

|Hardware: BASYS2 board with Xilinx Spartan 3E (xc3s100e-5cp132) FPGA |
|Software: Xilinx ISE development software. |

Procedure

We copied the skeleton of the finite state machine code, and the testbench off of the T drive: [T:\Carl.Greco\ELEG_2130\Labs\T-Bird_Tail_Lights]. After that, we found the state equations. (see Figure 1) We continued by implementing our equations to found the code needed. In figure 2 we verified and simulated the VHDL code by running it for 10 ms. Then we made the needed pin for downloading the program to the Basys2 board by using PlanAhead. In the end, we downloaded and tested the program on the Basys2 board.

Results

while simulating the VHDL code, the program work correctly after we restarted the Basys2 board.

Discussion Questions

1. What type of state machine is this, Moore or Mealy? A Moore state machine. 2. How many states are there and how many flip-flops would be required to implement this state machine using binary state assignment (Simplest in Table 7-6)? There were eight states in this state machine and 3 flip-flops.. 3. How many total Slice Flip Flops, 4 input LUTs, Slices, and IOBs were used for each of the implementations of the tail light controller? It is 36 Slice Flip Flops, 19 4-input LUTs, 26 Slices, and 11 IOBs. What is a LUT? It is the look up table, which computerized the truth table. 4. Why is