68k Methodology and Theory

Methodology and Theory Our 68K can operate in either 16 bit or 8 bit external mode determined by pulling the mode pin either high (@ 5 volts) for 16 bit mode or low (@ 0 volts) for 8 bit mode. Internally, by incorporating the upper and lower data strobes, the 68K is capable of either 16 bit, 32 bit or 8 bit processing. The upper and lower data strobes will henceforth be referred to as UDS and LDS respectively. For our application we choose 8 bit external and internal modes by leaving the UDS floating and only incorporating the LDS. This means that the 68K utilizes 8 data lines. These data lines are labeled D0 threw D7. D8 threw D15 where left floating or disconnected. If we had chosen, for example, to operate with 32 bit mode we would have incorporated all 16 data lines D0 threw D15 and both the LDS and UDS. If we had chosen to operate in 16 bit mode we would’ve had our choice as to operate in external 16 bit mode using all 16 data lines and only using the LDS or we could have incorporated both the UDS and the LDS and only used D0 threw D7. The choice would be made depending upon the peripherals we wanted to use for our individual application. The Data lines are bidirectional meaning that they can carry either an input or an output. The read/write* pin communicates whether an input is being read or an output being written. The asterisk indicates that when the pin is high it is communicating a read and when the pin is low a write is being communicated. The read write pin is henceforth referred to as R/W*. DTACK* refers to the data transfer acknowledge pin and is active low as indicated by the asterisk. The data being transferred between devices can be stored into memory. Memory is divided into address locations. Each address location is capable of storing a sequence of data signals. The 68K is capable of accessing memory locations from $00 0000 to $FF FFFF